System-on-chip test architectures
System-on-chip test architectures nanometer design for testability / [electronic resource] :
edited by Laung-Terng Wang, Charles E. Stroud, Nur A. Touba.
- Amsterdam ; Boston : Morgan Kaufmann Publishers, c2008.
- xxxvi, 856 p. : ill.
- The Morgan Kaufmann series in systems on silicon .
- Morgan Kaufmann series in systems on silicon. .
Includes bibliographical references and index.
Electronic reproduction.
Palo Alto, Calif. :
ebrary,
2013.
Available via World Wide Web.
Access may be limited to ebrary affiliated libraries.
Systems on a chip--Testing.
Integrated circuits--Very large scale integration--Testing.
Integrated circuits--Very large scale integration--Design.
Electronic books.
TK7895.E42 / S978 2008eb
621.39/5
Includes bibliographical references and index.
Electronic reproduction.
Palo Alto, Calif. :
ebrary,
2013.
Available via World Wide Web.
Access may be limited to ebrary affiliated libraries.
Systems on a chip--Testing.
Integrated circuits--Very large scale integration--Testing.
Integrated circuits--Very large scale integration--Design.
Electronic books.
TK7895.E42 / S978 2008eb
621.39/5