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Technology evolution for silicon nano-electronics (Record no. 99893)

MARC details
000 -LEADER
fixed length control field 05524nam a2200409 a 4500
082 04 - DEWEY DECIMAL CLASSIFICATION NUMBER
Classification number 621.3815
245 10 - TITLE STATEMENT
Title Technology evolution for silicon nano-electronics
260 ## - PUBLICATION, DISTRIBUTION, ETC. (IMPRINT)
Place of publication Stafa-Zurich, Switzerland ;
-- Enfield, N.H. :
Name of publisher Trans Tech Publications,
Year of publication c2011.
300 ## - PHYSICAL DESCRIPTION
Number of Pages xi, 234 p. :
Other physical details ill.
505 0# - FORMATTED CONTENTS NOTE
Formatted contents note High Mobility Ge-Based CMOS Device Technologies -- SiGe-Mixing-Triggered Rapid-Melting-Growth of High-Mobility Ge-On-Insulator -- Impact of Self-Heating Effect on the Electrical Characteristics of Nanoscale Devices -- Functional Device Applications of Nanosilicon -- Tunable Single-Electron Turnstile Using Discrete Dopants in Nanoscale SOI-FETs -- KFM Observation of Electron Charging and Discharging in Phosphorus-Doped SOI Channel -- Photoluminescence Characteristics of Ultra-Thin Silicon-on-Insulator at Low Temperatures -- Investigation about I-V Characteristics in a New Electronic Structure Model of the Ohmic Contact for Future Nano-Scale Ohmic Contact -- Collective Electron Tunneling Model in Si-Nano Dot Floating Gate MOS Structure -- Electronic Structure and Spin-Injection of Co-Based Heusler Alloy/ Semiconductor Junctions -- First-Principles Calculations of the Dielectric Constant for the GeO2 Films -- Nanosize Electronics Material Analysis by Local Quantities Based on the Rigged QED Theory -- Novel Source Heterojunction Structures with Relaxed-/Strained-Layers for Quasi-Ballistic CMOS Transistors -- Effect of Al2O3 Deposition and Subsequent Annealing on Passivation of Defects in Ge-Rich SiGe-on-Insulator -- Controlled Synthesis of Carbon Nanowalls for Carbon Channel Engineering -- Resistive Memory Utilizing Ferritin Protein with Nano Particle -- Atomically Controlled Plasma Processing for Group IV Quantum Heterostructure Formation -- Nanometer-Scale Characterization Technique for Si Nanoelectric Materials Using Synchrotron Radiation Microdiffraction -- Generation and Growth of Atomic-Scale Roughness at Surface and Interface of Silicon Dioxide Thermally Grown on Atomically Flat Si Surface -- Nano-Surface Modification of Silicon with Ultra-Short Pulse Laser Process -- Evaluation of Strained Silicon by Electron Back Scattering Pattern Compared with Raman Measurement and Edge Force Model Calculation -- Development of New Methods for Fine-Wiring in Si Using a Wet Catalytic Reaction -- Optical Response of Si-Quantum-Dots/NiSi-Nanodots Stack Hybrid Floating Gate in MOS Structures -- Energy Band Engineering of Metal Nanodots for High Performance Nonvolatile Memory Application -- Strained Ge and Ge1-xSnx Technology for Future CMOS Devices -- Improved Electrical Properties and Thermal Stability of GeON Gate Dielectrics Formed by Plasma Nitridation of Ultrathin Oxides on Ge(100) -- Structural Change during the Formation of Directly Bonded Silicon Substrates -- Microscopic Structure of Directly Bonded Silicon Substrates -- Formation of Nanotubes of Carbon by Joule Heating of Carbon-Contaminated Si Nanochains -- Si Nanodot Device Fabricated by Thermal Oxidation and their Applications -- Influences of Carrier Transport on Drain-Current Variability of MOSFETs -- Resistive Switching in NiO Bilayer Films with Different Crystallinity Layers -- Analysis of Threshold Voltage Variations in Fin Field Effect Transistors -- Capture/Emission Processes of Carriers in Heterointerface Traps Observed in the Transient Charge-Pumping Characteristics of SiGe/Si-Hetero-Channel pMOSFETs -- Quasi-Ballistic Transport in Nano-Scale Devices: Boundary Layer, Potential Fluctuation, and Coulomb Interaction -- Effect of Back Bias on Variability in Intrinsic Channel SOI MOSFETs -- Discrete Dopant Effects on Threshold Voltage Variation in Double-Gate and Gate-All-Around Metal-Oxide-Semiconductor Field-Effect-Transistors -- Interconnect Design Challenges in Nano CMOS Circuit.
650 #0 - SUBJECT ADDED ENTRY--TOPICAL TERM
Topical Term Nanoelectronics
Topical Term Nanostructured materials
Topical Term Metal oxide semiconductors
700 1# - ADDED ENTRY--PERSONAL NAME
Personal name Miyazaki, Seiichi.
Personal name Tabata, Hitoshi.
856 40 - ELECTRONIC LOCATION AND ACCESS
Uniform Resource Identifier http://site.ebrary.com/lib/rucke/Doc?id=10604254

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