01187nam a2200289Ia 4500001001200000003000800012006001900020007001500039008004100054020002500095020002200120040002100142035002100163050002700184082001600211100004500227245007200272260005200344300002500396504006600421533015200487650006100639650002500700655002900725710001700754856012600771ebr10188606CaPaEBRm        u        cr cn|||||||||070227s2007    ne a    sb    001 0 eng d  z9780750668453 (pbk.)  z0750668458 (pbk.)  aCaPaEBRcCaPaEBR  a(OCoLC)17350237314aTK7895.G36bW55 2007eb04a621.3952221 aWilson, Peter R.q(Peter Robert),d1939-10aDesign recipes for FPGAsh[electronic resource] /cPeter R. Wilson.  aAmsterdam ;aBoston ;aLondon :bNewnes,c2007.  axxii, 289 p. :bill.  aIncludes bibliographical references (p. [284]-285) and index.  aElectronic reproduction.bPalo Alto, Calif. :cebrary,d2009.nAvailable via World Wide Web.nAccess may be limited to ebrary affiliated libraries. 0aField programmable gate arraysxDesign and construction. 0aGate array circuits. 7aElectronic books.2local2 aebrary, Inc.40uhttp://site.ebrary.com/lib/rucke/Doc?id=10188606zAn electronic book accessible through the World Wide Web; click to view