02137nam a2200349 a 4500 ebr10630577 CaPaEBR m u cr cn||||||||| 120125s2012 njua sb 001 0 eng d 2011048946 9781118011034 (hardback) 9781118309469 (e-book) CaPaEBR CaPaEBR (OCoLC)774024203 TK7895.E42 C48 2012eb 006.2/2 23 Chu, Pong P., 1959- Embedded SoPC design with NIOS II processor and Verilog examples [electronic resource] / Pong P. Chu. Hoboken, N.J. : Wiley, c2012. xxxiii, 747 p. : ill. Includes bibliographical references and index. pt. I. Basic digital circuits development -- pt. II. Basic NIOS II software development -- pt. III. Custom I/O peripheral development -- pt. IV. Hardware accelerator case studies. "This book explores the unique hardware programmability of FPGA (field-programmable gate array)-based embedded systems, using a learning-by-doing approach to introduce the concepts and techniques for embedded SoPC (system on a programmable chip) systems with Verilog. The book contains a large number of practical examples to illustrate and reinforce the hardware and software design concepts and techniques, as well as a complete code listing and experiment problems. The book is designed for upper-level undergraduate and entry-level graduate students in computer engineering, as well as practicing engineers"-- Provided by publisher. Electronic reproduction. Palo Alto, Calif. : ebrary, 2011. Available via World Wide Web. Access may be limited to ebrary affiliated libraries. Embedded computer systems. Field programmable gate arrays. Verilog (Computer hardware description language) Electronic books. local ebrary, Inc. http://site.ebrary.com/lib/rucke/Doc?id=10630577 An electronic book accessible through the World Wide Web; click to view 52812 52812