01341nam a22003254a 4500001001200000003000800012006001900020007001500039008004100054010001700095020002800112040002100140035002000161050002700181082001700208100003100225245013800256260005400394300002500448504005100473533015200524650001900676650005900695650003600754655002900790700002800819700002500847710001700872856012600889ebr10048276CaPaEBRm        u        cr cn|||||||||001025s2001    maua    sb    001 0 eng    z   00052567   z0792372794 (alk. paper)  aCaPaEBRcCaPaEBR  a(OCoLC)5566406914aQA76.9.S88bR37 2001eb04a621.39/52211 aRashinkar, Prakash,d1960-10aSystem-On-A-Chip verificationh[electronic resource] :bmethodology and techniques /cPrakash Rashinkar, Peter Paterson, Leena Singh.  aBoston, MA :bKluwer Academic Publishers,cc2001.  axiii, 372 p. :bill.  aIncludes bibliographical references and index.  aElectronic reproduction.bPalo Alto, Calif. :cebrary,d2013.nAvailable via World Wide Web.nAccess may be limited to ebrary affiliated libraries. 0aSystem design. 0aElectronic digital computersxDesign and construction. 0aComputer softwarexDevelopment. 7aElectronic books.2local1 aPaterson, Peter,d1955-1 aSingh, Leena,d1971-2 aebrary, Inc.40uhttp://site.ebrary.com/lib/rucke/Doc?id=10048276zAn electronic book accessible through the World Wide Web; click to view