| 000 | 01375nam a2200313Ia 4500 | ||
|---|---|---|---|
| 001 | ebr10053381 | ||
| 003 | CaPaEBR | ||
| 006 | m u | ||
| 007 | cr cn||||||||| | ||
| 008 | 040626s2002 nyua gsb 001 0 eng d | ||
| 020 | _z0306476312 | ||
| 040 |
_aCaPaEBR _cCaPaEBR |
||
| 035 | _a(OCoLC)70755619 | ||
| 050 | 1 | 4 |
_aTK7874.75 _b.B47 2002eb |
| 100 | 1 |
_aBening, Lionel, _d1939- |
|
| 245 | 1 | 0 |
_aPrinciples of verifiable RTL design _h[electronic resource] : _ba functional coding style supporting verification processes in Verilog / _cLionel Bening and Harry Foster. |
| 250 | _a2nd ed. | ||
| 260 |
_aNew York : _bKluwer Academic, _cc2002. |
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| 300 |
_axxiv, 281 p. : _bill. |
||
| 504 | _aIncludes bibliographical references and index. | ||
| 533 |
_aElectronic reproduction. _bPalo Alto, Calif. : _cebrary, _d2009. _nAvailable via World Wide Web. _nAccess may be limited to ebrary affiliated libraries. |
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| 650 | 0 |
_aIntegrated circuits _xVery large scale integration _xComputer-aided design. |
|
| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 650 | 0 |
_aElectronic digital computers _xComputer-aided design. |
|
| 655 | 7 |
_aElectronic books. _2local |
|
| 700 | 1 |
_aFoster, Harry, _d1956- |
|
| 710 | 2 | _aebrary, Inc. | |
| 856 | 4 | 0 |
_uhttp://site.ebrary.com/lib/rucke/Doc?id=10053381 _zAn electronic book accessible through the World Wide Web; click to view |
| 999 |
_c65640 _d65640 |
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