| 000 | 01436nam a2200373 a 4500 | ||
|---|---|---|---|
| 001 | ebr10301213 | ||
| 003 | CaPaEBR | ||
| 006 | m u | ||
| 007 | cr cn||||||||| | ||
| 008 | 071023s2008 enka sb 001 0 eng | ||
| 010 | _z 2007043838 | ||
| 015 |
_aGBA804994 _2bnb |
||
| 016 | 7 |
_z014488216 _2Uk |
|
| 020 | _z9780470060704 | ||
| 020 | _z0470060700 | ||
| 040 |
_aCaPaEBR _cCaPaEBR |
||
| 035 | _a(OCoLC)647785527 | ||
| 050 | 1 | 4 |
_aTK7885.7 _b.M54 2008eb |
| 082 | 0 | 4 |
_a004/.33 _222 |
| 100 | 1 | _aMinns, Peter D. | |
| 245 | 1 | 0 |
_aFSM-based digital design using Verilog HDL _h[electronic resource] / _cPeter Minns, Ian Elliott. |
| 246 | 3 | _aFinite state machine based digital design using Verilog HDL | |
| 260 |
_aChichester, England ; _aHoboken, NJ : _bJ. Wiley & Sons, _cc2008. |
||
| 300 |
_axiii, 391 p. : _bill. |
||
| 504 | _aIncludes bibliographical references and index. | ||
| 533 |
_aElectronic reproduction. _bPalo Alto, Calif. : _cebrary, _d2013. _nAvailable via World Wide Web. _nAccess may be limited to ebrary affiliated libraries. |
||
| 650 | 0 | _aVerilog (Computer hardware description language) | |
| 650 | 0 | _aDigital electronics. | |
| 650 | 0 | _aSequential machine theory. | |
| 655 | 7 |
_aElectronic books. _2local |
|
| 700 | 1 | _aElliott, Ian D. | |
| 710 | 2 | _aebrary, Inc. | |
| 856 | 4 | 0 |
_uhttp://site.ebrary.com/lib/rucke/Doc?id=10301213 _zAn electronic book accessible through the World Wide Web; click to view |
| 999 |
_c67478 _d67478 |
||