Logic synthesis and verification algorithms
Hachtel, Gary D.
Logic synthesis and verification algorithms [electronic resource] / by Gary D. Hachtel, Fabio Somenzi. - Boston : Kluwer Academic, c2002, 1996. - xxxii, 597 p. : ill.
Includes bibliographical references and index.
Electronic reproduction.
Palo Alto, Calif. :
ebrary,
2009.
Available via World Wide Web.
Access may be limited to ebrary affiliated libraries.
Computer-aided design.
Integrated circuits--Verification.
Integrated circuits--Very large scale integration--Design and construction--Data processing.
Logic design--Data processing.
Electronic books.
TK7874.75 / .H33 2002eb
Logic synthesis and verification algorithms [electronic resource] / by Gary D. Hachtel, Fabio Somenzi. - Boston : Kluwer Academic, c2002, 1996. - xxxii, 597 p. : ill.
Includes bibliographical references and index.
Electronic reproduction.
Palo Alto, Calif. :
ebrary,
2009.
Available via World Wide Web.
Access may be limited to ebrary affiliated libraries.
Computer-aided design.
Integrated circuits--Verification.
Integrated circuits--Very large scale integration--Design and construction--Data processing.
Logic design--Data processing.
Electronic books.
TK7874.75 / .H33 2002eb